The Rambus PCI Express (PCIe) 5.0 and Compute Express Link (CXL) PHY is a low-power, area-optimized, silicon IP core designed with a system-oriented approach to maximize flexibility and ease of integration. It comprises a complete SerDes subsystem with the Northwest Logic Expresso 5.0 controller core or can integrate with PIPE 5.2-compliant 3rd-party controllers. The PCIe 5.0 PHY supports PCIe 5.0, 4.0, 3.0 and 2.0 and has full support for manufacturability.

Download this brief to:

  • Learn about the PCIe 5.0 PHY
  • See how it integrates with the Northwest Logic Expresso 5.0 controller core

PCIe 4.0 PHY Product Brief Cover