Unlocking the Potential of CXL 3.1 and PCIe 6.1 for Next-Generation Data Centers

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Increased demand for bandwidth, capacity and compute, coupled with the implications for increased data center costs, are the realities of the AI revolution. This is driving the need for new disaggregated architectures in the data center. Join Lou Ternullo to learn about how PCIe 6.1 and CXL 3.1 interfaces are evolving to address the needs of the next-generation data center.

Featured Speaker

Lou Ternullo, Senior Director of Product Marketing

Lou Ternullo

Senior Director of Product Marketing, Rambus

Lou Ternullo is senior director of product marketing for Rambus CXL and PCIe controller IP. Lou has over 30 years of semiconductor industry experience during which he has held positions in memory design and engineering, with the past 16 years focused on product management/marketing and business development in IP and ASIC-related businesses. Prior to joining Rambus, he held leadership positions at Virage Logic, Cadence and eSilicon. Lou’s technology and product-related experience includes memory, high-speed memory and storage interface IP, as well as CXL and PCIe interface IP. In his most recent roles, Lou has leveraged his experience in IP and ASIC businesses to drive product definition and execution of complete products that enable customer success.