Chiplets are gaining significant traction as they deliver numerous benefits beyond what can be accomplished with a monolithic SoC in a time of slowing transistor scaling. However, disaggregating SoCs into multiple chiplets increases the attack surface which adversaries can exploit to penetrate safeguards to data and hardware. With chiplets, the risks of hardware-based trojans and exploits such as man-in-the-middle attacks all rise. To realize the many benefits of chiplets, designers should use a design for security approach, and implement security safeguards anchored in hardware.
Read the white paper to learn:
- Threat vectors faced by chiplet architectures
- Safeguards for securing chiplet devices
- Rambus solutions for chiplet security
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