The Rambus PCI Express® (PCIe®) 6.0 PHY is a low-power, area-optimized, silicon IP core designed with a system-oriented approach to maximize flexibility and ease of integration. It delivers data rates of up to 64 Gigatransfers per second (GT/s) for AI/ML and other data intensive workloads, and it supports the latest version of the Compute Express Link™ (CXL™) specification, version 3.0.

The PCIe 6.0 PHY can be combined with the Rambus PCIe 6.0 Controller to make a complete PCIe 6.0 interface subsystem.

Download this brief to:

  • Learn about the PCIe 6.0 PHY
  • See how it integrates with the Rambus PCIe 6.0 Controller

Download the Rambus PCIe 6.0 SerDes PHY Product Brief