The Rambus PCI Express® (PCIe®) 6.0 interface subsystem is a low-power, area optimized, silicon IP designed with a system-oriented approach to maximize flexibility and ease of integration. It consists of a co-verified PHY and digital controller providing a complete PCIe 6.0 interface subsystem.
The subsystem delivers data rates of up to 64 Gigatransfers per second (GT/s) for AI/ML and other data intensive workloads. With optional IDE Engine, the solution offers cutting-edge security to protect valuable data assets.
Download this brief to:
- Learn about the benefits of this integrated PCIe 6.0 interface subsystem solution
- Discover the main features of the PCIe 6.0 Controller and PHY
- Read about the Integrity and Data Encryption (IDE) Engine for advanced data protection