For AI and HPC applications, HBM2E memory can deliver excellent bandwidth, capacity and latency in a very compact footprint thanks to its 2.5D/3D structure. The flipside is that this same structure leads to greater design complexity and raises a new set of implementation considerations.
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Ming Li received his B.S., M.S. and Ph.D. degrees in materials science and engineering in 1984, 1987 and 1995 respectively. He has been a packaging engineer at Rambus since 2000. At Rambus, Ming is responsible for IC packaging design, development and modeling, thermal and mechanical modeling of electronic packaging and systems, IC package layout, advanced IC packaging development, IC packaging assembly management and vendor relationship, and 3D IC and 2.5D silicon interposer design and process development. Previously, he worked at Sandia National Labs as a research associate, at Tessera as a modeling engineer, and at PerkinElmer as a senior packaging engineer.
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