With the formal release of the HBM3 specification, memory bandwidth for AI/ML and HPC shifts to a higher gear. Terabytes of bandwidth are possible using HBM3’s 2.5D/3D architecture. Join memory expert Frank Ferro as he discusses what changes come with the new generation of HBM, and how the Rambus HBM3 memory subsystem can help designers unleash the full power of their HBM3-enabled accelerators and SoCs.
Frank FerroSenior Director, Product Marketing, RambusFrank Ferro is the senior director of product management at Rambus Inc. responsible for memory interface IP products. Having spent more than 20 years at AT&T, Lucent and Agere Systems, he has extensive experience in wireless communications, networking and consumer electronics fields. Mr. Ferro holds an executive MBA from the Fuqua School of Business at Duke University, an M.S. in computer science and a B.S.E.T. in electronic engineering technology from the New Jersey Institute of Technology. |