Memory Bandwidth Races Higher with HBM3

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With the formal release of the HBM3 specification, memory bandwidth for AI/ML and HPC shifts to a higher gear. Terabytes of bandwidth are possible using HBM3’s 2.5D/3D architecture. Join memory expert Frank Ferro as he discusses what changes come with the new generation of HBM, and how the Rambus HBM3 memory subsystem can help designers unleash the full power of their HBM3-enabled accelerators and SoCs.

In this webinar, you will learn:

  • Capabilities of HBM3 memory
  • Design considerations for HBM3 2D/3D implementations
  • Features of the Rambus HBM3 Memory Interface Subsystem


Frank Ferro

Frank Ferro

Senior Director, Product Marketing, Rambus

Frank Ferro is the senior director of product management at Rambus Inc. responsible for memory interface IP products. Having spent more than 20 years at AT&T, Lucent and Agere Systems, he has extensive experience in wireless communications, networking and consumer electronics fields. Mr. Ferro holds an executive MBA from the Fuqua School of Business at Duke University, an M.S. in computer science and a B.S.E.T. in electronic engineering technology from the New Jersey Institute of Technology.