Hidden Signals: Memory and Interconnect Decisions for AI, IoT and 5G

According to IDC, data created by electronic systems will grow 10x to 103 zettabytes between 2014 to 2023, and the average server will support over 670 gigabytes of DRAM in 2023¹. The underpinnings to this market growth are not only interfaces or chip connectivity and where data is stored in real-time, but also the connectivity between systems and processors computing the data.

Technologies critical to handling this deluge in data include GDDR6, HBM, high speed SerDes and memory buffers. These components move, accelerate, and store the data that enable the applications of the future including artificial intelligence (AI), Internet of Things (IoT) and 5G.

¹IDC Technology Spotlight, “Hidden Signals: The Memories and Interfaces Enabling IoT, 5G, and AI”

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Shane Rau
Research Vice President, Computing Semiconductors, IDC

Shane Rau leads IDC's computing semiconductor research within IDC's Enabling Technologies team. Mr. Rau's research covers microprocessors and SoCs, discrete graphics processors (GPUs), FPGAs, and artificial intelligence (AI) accelerators in systems across the internet, including in the data center, in PCs, and at the edge, such as embedded and intelligent systems.

Mr. Rau provides in-depth insight and intelligence on market sizing, forecasting, technology trends, vendors, pricing trends, and market share. Through collaboration with PC, server and embedded systems analysts colleagues, Mr. Rau spearheads IDC research initiatives into system supply chains, technologies and interface attach rates, as well as into the changing semiconductor vendor market power dynamics.

Steven Woo
Fellow and Distinguished Inventor, Rambus

Steven Woo is a Fellow and Distinguished Inventor at Rambus Inc. Since joining Rambus, Steve has worked in various roles leading architecture, technology, and performance analysis efforts, and in marketing and product planning roles leading strategy and customer programs.

Steve has over 30 patents in the areas of memory, memory systems, and neural networks. Steve received his PhD and MS degrees in Electrical Engineering from Stanford University, and Master of Engineering and BS Engineering degrees from Harvey Mudd College.

Hidden Signals: Memory and Interconnect Decisions
for AI, IoT and 5G

In this webinar, you'll learn:

Watch Webinar

Featured Speakers

Shane Rau
Research Vice President, Computing Semiconductors, IDC

Steven Woo
Fellow and Distinguished Inventor, Rambus

About

Products

Markets

Resources

Hidden Signals: Memory and Interconnect Decisions for AI, IoT and 5G

In this webinar, you'll learn:

Watch Webinar

Featured Speakers

Shane Rau Research Vice President, Computing Semiconductors, IDC

Steven Woo Fellow and Distinguished Inventor, Rambus

About

Products

Markets

Resources

Hidden Signals: Memory and Interconnect Decisions
for AI, IoT and 5G

Shane Rau
Research Vice President, Computing Semiconductors, IDC

Steven Woo
Fellow and Distinguished Inventor, Rambus