The Rambus Compute Express Link (CXL) 3.1 Controller leverages a silicon-proven PCIe controller architecture for the path, and adds CXL.cache and CXL.mem paths specific to the CXL standard.

Download this brief to:

  • Learn the features and specifications
  • Review the block diagram
  • Check the available support and integration services

CXL 3.1 Controller Product Brief