The Rambus 24G GDDR6 memory interface subsystem is fully compliant to the JEDEC JESD250C standard and is optimized for systems that require a high-bandwidth, low-latency memory solution. The interface supports two 16-bit wide channels for a total data width of 32 bits. With speeds up to 24 Gb/s per pin, it offers a maximum bandwidth of 96 GB/s.
The interface consists of a co-verified PHY and digital controller comprising a complete GDDR6 memory interface sub-system. The PHY is available in an advanced FinFET for leading-edge SoC integration.
