AI 2.0 Driving Demand for Memory Performance

We’re witnessing an unprecedented time for computing. Advanced data center workloads, with Generative AI, also known as AI 2.0, setting a blistering pace for hardware performance improvements. This is catalyzing advancements in all elements of the computing architecture including the rapid evolution of server main memory.

Hear from IDC guest speaker, Jeff Janukowicz, and Rambus' John Eble, as they set the market context and provide adoption expectations for the industry. Learn more about:

How DDR5 memory is critical to AI 2.0
New module architectural innovations provide increased bandwidth and capacity
Power management is a key enabler of memory performance
How multiplexing will enable continued scaling of performance for DDR5

Speakers

Jeff Janukowicz

Research Vice President, Solid State Drives and Enabling Technologies

Jeff Janukowicz is a Research Vice President at IDC where he provides insight and analysis on the SSD market for the Client PC, Enterprise Data Center, and Cloud market segments. In this role, Jeff provides expert opinion, in-depth market research, and strategic analysis on the dynamics, trends, and opportunities facing the industry. His research includes market forecasts, market share reports, and technology trends of clients, investor, suppliers, and manufacturers.

John Eble

VP, Product Marketing, Rambus

John C. Eble received his B.Cmp.E. (’93), M.S.E.E (’94), and Ph.D. EE (’99) from Georgia Tech. From 1998 to 2001 he worked at Compaq on EV7 high-speed I/O circuits in the Alpha Microprocessor Development Group. He then joined Velio Communications as a circuit designer. In 2003, he joined Rambus Inc. where he has held many engineering and research management roles and specialized in the design of high-speed I/O and next-generation memory interconnect architectures. He has authored over 30 technical publications, 10 patents, and a book chapter. He is currently VP of Product Marketing for Rambus’ memory interconnect chip business unit.

Webinar